Keynote Speakers

Dr. Michael Gschwind is a Senior Technical Staff Member and Senior Manager of the Systems Architecture team responsible for IBM's Power and mainframe architecture evolution. During his career at IBM, Mike has served as leader for many of IBM's microprocessor products, including architecture lead for Power8, Power7 and the PERCS project, Floating Point Chief Architect for BlueGene, Core Reliability lead for the BlueGene/Q microprocessor, lead architect for the XBox360 VMX128 multimedia architecture and the Cell Broadband Engine and its accelerators, and several generations of binary translation architecture (BOA, DAISY, DAISY/390). Dr. Gschwind served as design lead for the BlueGene/Q floating point unit, as core reliability lead for the BlueGene/Q core and as IFU and IDU lead and chief microarchitect for the Komal core which served as the foundation for IBM's successful Power7 and Power8 products. In addition to his leadership role in hardware design, Dr. Gschwind also developed the first Cell compiler and served as lead for the definition of the Cell and OpenPower LE software development environments. Dr. Gschwind has published numerous articles and received about 100 patents in the area of computer architecture. In 2006, Dr. Gschwind was recognized as an IT Innovator and Influencer by InformationWeek. Dr. Gschwind is a member of the ACM SIGMICRO Executive Board, an ACM Distinguised Speaker, a Member of the IBM Academy of Technology, an IBM Master Inventor and an IEEE Fellow.

TITLE: Open Power: Liberating Scale Out Data Centers with Power8

ABSTRACT: With the creation of the Open Power Foundation, the Open Power partner companies are looking to extend the reach of Power into massive scale-out data center computing environments. This will give data center operators more choice and free them from lock-in into the desktop processors currently used in these environments. To drive this transformation in scale out datacenter computing, the Open Power Foundation is being created as a framework in which to innovate around Power in architecture, I/O, system design and software. The first Open Power systems were recently announced based on the newly introduced Power8 processor. In addition to providing significant performance improvements over previous microprocessors. In addition, Power8 was designed to deliver unprecedented performance for emerging workloads, such as Business Analytics and Big Data applications, Cloud computing and Scale out Datacenter workloads. Finally, the CAPI accelerator provides a high-performance interconnect for accelerators.

To extend Power into the scale out datacenter space, IBM is reengineering the Power environment: IBM is developing a new system software stack using an open firmware available to third party system developers, and an open source-based hypervisor based on KVM. In addition, because many applications in this space were developed and tested exclusively in a little-endian environment, databases in storage may be stored in little-endian format, and to leverage a wide range of commodity I/O solutions/ the new Open Power environment will operate in little-endian mode. The new software stack is built with a new Open Power ABI which is introduced in conjunction with Open Power to take advantage of new architecture, microarchitecture and compiler opportunities by Power and future Open Power processors. In this talk I will discuss the Open Power Foundation and the new opportunities it is creating for Power, and then focus on the new Open Power software stack and in particular the Open Power ABI. To simplify application development for SIMD vector code, the Open Power environment also specifies a new little-endian vector SIMD programming API, as well as a "big-on-little" API to facilitate porting of big-endian code to little-endian environment and the maintenance of vector libraries targeting both little- and big-endian systems.


ZHANG Yunquan

I am a full professor of Computer Science at Chinese Academy of Sciences in Beijing, China. I also serve as Professor of the State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences. My other current appointments include the Expert Review Group member of Information Sciences Division of the National Science Foundation (China), Secretary-General of China's High Performance Computing Expert Committee, Technical Committee of National 863 “High-Performance Computer Evaluation Center”, and General Secretary of the Specialty Association of Mathematical & Scientific Software of China. I received a PhD degree in Computer Software and Theory from the Chinese Academy of Sciences in 2000. My research interests are in the areas of high performance parallel computing, with particular emphasis on large scale parallel computation and programming models, high-performance parallel numerical algorithms, and performance modeling and evaluation for parallel programs. I have published over 100 papers in international journals and conferences proceedings. Recently I served as Co-Chair of Program Committee of IEEE CSE 2010 and IEEE HPCC 2013, Vice-Chair of Program Committee of High-Performance Computing China (2008 ~ 2012), member of Steering Committee of International Supercomputing Conference 2012, member of Program Committee of IEEE ICPADS 2008, ACM ICS 2010, IEEE IPDPS 2012, IEEE CCGRid 2012 and CGO 2013. I also organize and distribute China’s TOP100 List of High Performance Computers, which traces and reports the development of the HPC system technology and usage in China. This list includes Tianhe-1A supercomputer that ranked as the world’s fast supercomputer in 2011.